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INTEGRATED CIRCUITS
DATA SHEET
TDA8790 8-bit, 40 Msps 2.7 to 5.5 V universal analog-to-digital converter
Product specification Supersedes data of 1995 May 08 File under Integrated Circuits, IC02 1996 Feb 21
Philips Semiconductors
Product specification
8-bit, 40 Msps 2.7 to 5.5 V universal analog-to-digital converter
FEATURES * 8-bit resolution * Operation between 2.7 and 5.5 V * Sampling rate up to 40 MHz * DC sampling allowed * High signal-to-noise ratio over a large analog input frequency range (7.3 effective bits at 4.43 MHz full-scale input at fclk = 40 MHz) * CMOS/TTL compatible digital inputs and outputs * External reference voltage regulator * Power dissipation only 30 mW (typical) * Low analog input capacitance, no buffer amplifier required * Sleep mode (4 mW) * No sample-and-hold circuit required. QUICK REFERENCE DATA SYMBOL VDDA VDDD VDDO VDD PARAMETER analog supply voltage digital supply voltage output stages supply voltage supply voltage difference VDDA - VDDD VDDD - VDDO IDDA IDDD IDDO INL DNL fclk(max) Ptot analog supply current digital supply current output stages supply current integral non-linearity differential non-linearity maximum clock frequency total power dissipation VDDA = VDDD = VDDO = 3.3 V fclk = 40 MHz; CL = 20 pF; ramp input fclk = 40 MHz; ramp input fclk = 40 MHz; ramp input -0.2 -0.2 - - - - - 40 - - - 4 5 1 0.5 0.25 - 30 CONDITIONS MIN. 2.7 2.7 2.5 TYP. 3.3 3.3 3.3 APPLICATIONS
TDA8790
High-speed analog-to-digital conversion for: * Video data digitizing * Camera * Camcorder * Radio communication. GENERAL DESCRIPTION The TDA8790 is an 8-bit universal analog-to-digital converter (ADC) for video and general purpose applications. It converts the analog input signal from 2.7 to 5.5 V into 8-bit binary-coded digital words at a maximum sampling rate of 40 MHz. All digital inputs and outputs are CMOS/TTL compatible. A sleep mode allows reduction of the device power consumption down to 4 mW.
MAX. 5.5 5.5 5.5 +0.2 +2.25 6 8 2 0.75 0.5 - 53
UNIT V V V V V mA mA mA LSB LSB MHz mW
ORDERING INFORMATION TYPE NUMBER TDA8790M PACKAGE NAME SSOP20 DESCRIPTION plastic shrink small outline package; 20 leads; body width 4.4 mm VERSION SOT266-1
1996 Feb 21
2
Philips Semiconductors
Product specification
8-bit, 40 Msps 2.7 to 5.5 V universal analog-to-digital converter
BLOCK DIAGRAM
TDA8790
handbook, full pagewidth
V DDA 5
CLK 1
VDDD 3
CLOCK DRIVER V RT 10
2
TDA8790
SLEEP
19 D7 RLAD analog voltage input VI 9 ANALOG -TO - DIGITAL CONVERTER LATCHES CMOS OUTPUTS 18 D6 17 D5 16 D4 15 D3 14 D2 13 D1 12 D0 VRB 7 20 LSB VDDO data outputs MSB
V RM 8
6 VSSA analog ground
11 VSSO output ground
4 VSSD1
MBE502
digital ground
Fig.1 Block diagram.
1996 Feb 21
3
Philips Semiconductors
Product specification
8-bit, 40 Msps 2.7 to 5.5 V universal analog-to-digital converter
PINNING SYMBOL CLK SLEEP VDDD VSSD VDDA VSSA VRB VRM VI VRT VSSO D0 D1 D2 D3 D4 D5 D6 D7 VDDO PIN 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 clock input sleep mode input digital supply voltage (2.7 to 5.5 V) digital ground analog supply voltage (2.7 to 5.5 V) analog ground reference voltage BOTTOM input reference voltage MIDDLE analog input voltage reference voltage TOP input digital output ground data output; bit 0 (LSB) data output; bit 1 data output; bit 2 data output; bit 3 data output; bit 4 data output; bit 5 data output; bit 6 data output; bit 7 (MSB) positive supply voltage for output stage (2.7 to 5.5 V) Fig.2 Pin configuration.
CLK SLEEP VDDD VSSD VDDA VSSA VRB VRM VI 1 2 3 4 5
TDA8790
DESCRIPTION
20 VDDO 19 D7 18 D6 17 D5 16 D4
TDA8790
6 7 8 9 15 D3 14 D2 13 D1 12 D0 11 VSSO
MBE501
VRT 10
1996 Feb 21
4
Philips Semiconductors
Product specification
8-bit, 40 Msps 2.7 to 5.5 V universal analog-to-digital converter
LIMITING VALUES In accordance with the Absolute Maximum Rating System (IEC 134). SYMBOL VDDA VDDD VDDO VDD PARAMETER analog supply voltage digital supply voltage output stages supply voltage supply voltage difference VDDA - VDDD VDDA - VDDO VDDD - VDDO VI Vclk(p-p) IO Tstg Tamb Tj Note input voltage AC input voltage for switching (peak-to-peak value) output current storage temperature operating ambient temperature junction temperature referenced to VSSA referenced to VSSD -1.0 -1.0 -1.0 -0.3 - - -55 -20 - +4.0 +4.0 +4.0 +7.0 VDDD 10 +150 +75 +150 CONDITIONS note 1 note 1 note 1 MIN. -0.3 -0.3 -0.3
TDA8790
MAX. +7.0 +7.0 +7.0 V V V V V V V V
UNIT
mA C C C
1. The supply voltages VDDA, VDDD and VDDO may have any value between -0.3 V and +7.0 V provided that the supply voltage VDD remains as indicated. HANDLING Inputs and outputs are protected against electrostatic discharges in normal handling. However, to be totally safe, it is desirable to take normal precautions appropriate to handling integrated circuits. THERMAL CHARACTERISTICS SYMBOL Rth j-a PARAMETER thermal resistance from junction to ambient in free air VALUE 120 UNIT K/W
1996 Feb 21
5
Philips Semiconductors
Product specification
8-bit, 40 Msps 2.7 to 5.5 V universal analog-to-digital converter
TDA8790
CHARACTERISTICS VDDA = V5 to V6 = 3.3 V; VDDD = V3 to V4 = 3.3 V; VDDO = V20 to V11 = 3.3 V; VSSA, VSSD and VSSO shorted together; Vi(p-p) = 1.84 V; CL = 20 pF; Tamb = 0 to +70 C; typical values measured at Tamb = 25 C; unless otherwise specified. SYMBOL Supply VDDA VDDD VDDO VDD analog supply voltage digital supply voltage output stages supply voltage supply voltage difference VDDA - VDDD VDDD - VDDO IDDA IDDD IDDO Inputs CLOCK INPUT CLK (REFERENCED TO VSSD); see note 1 VIL VIH IIL IIH ZI CI VIL VIH IIL IIH IIL IIH ZI CI VRB VRT Vdiff Iref LOW level input voltage HIGH level input voltage VDDD 3.6 V LOW level input current HIGH level input current input impedance input capacitance Vclk = 0.3VDDD Vclk = 0.7VDDD fclk = 40 MHz fclk = 40 MHz 0 0.7VDDD 0.6VDDD -1 - - - 0 0.7VDDD VDDD 3.6 V LOW level input current HIGH level input current VIL = 0.3VDDD VIH = 0.7VDDD VI = VRB VI = VRT fi = 1 MHz fi = 1 MHz 0.6VDDD -1 - - - - - - - - 0 - 4 3 - - - - - 0 9 20 2 0.3VDDD VDDD VDDD +1 5 - - 0.3VDDD VDDD VDDD - +1 - - - - - VDDA 2.7 - V V V A A k pF analog supply current digital supply current output stages supply current fclk = 40 MHz; ramp input; CL = 20 pF -0.2 -0.2 - - - - - 4 5 1 +0.2 +2.25 6 8 2 V V mA mA mA 2.7 2.7 2.5 3.3 3.3 3.3 5.5 5.5 5.5 V V V PARAMETER CONDITIONS MIN. TYP. MAX. UNIT
INPUT SLEEP (REFERENCED TO VSSD); see Table 2 LOW level input voltage HIGH level input voltage V V V A A A A k pF
VI (ANALOG INPUT VOLTAGE REFERENCED TO VSSA) LOW level input current HIGH level input current input impedance input capacitance
Reference voltages for the resistor ladder; see Table 1 reference voltage BOTTOM reference voltage TOP differential reference voltage VRT - VRB reference current 6 VTOP VDDA 1.1 2.7 1.5 - 1.2 3.3 2.1 0.95 V V V mA
1996 Feb 21
Philips Semiconductors
Product specification
8-bit, 40 Msps 2.7 to 5.5 V universal analog-to-digital converter
SYMBOL RLAD TCRLAD VosB VosT Vi(p-p) Outputs DIGITAL OUTPUTS D7 TO D0 (REFERENCED TO VSSD) VOL VOH IOZ LOW level output voltage HIGH level output voltage output current in 3-state mode IO = 1 mA IO = -1 mA 0.4 V < VO < VDDO 0 -20 - - PARAMETER resistor ladder temperature coefficient of the resistor ladder offset voltage BOTTOM offset voltage TOP analog input voltage (peak-to-peak value) note 2 note 2 note 3 CONDITIONS - - - - - 1.4 MIN. TYP. 2.2 1860 4092 170 170 1.76 - - - - -
TDA8790
MAX.
UNIT k ppm m/K mV mV V
2.4
0.5 VDDO +20
V V A
VDDO - 0.5 -
Switching characteristics CLOCK INPUT CLK; see Fig.4; note 1 fclk(max) tCPH tCPL maximum clock frequency clock pulse width HIGH clock pulse width LOW 40 9 9 - - - - - - MHz ns ns
Analog signal processing LINEARITY INL DNL integral non-linearity differential non-linearity fclk = 40 MHz; ramp input; see Fig.6 fclk = 40 MHz; ramp input; see Fig.7 - - 0.5 0.25 0.75 0.5 LSB LSB
BANDWIDTH (fclk = 40 MHz) B analog bandwidth full-scale sine wave; note 4 75% full-scale sine wave; note 4 50% full-scale sine wave; note 4 small signal at mid scale; Vi = 10 LSB at code 128; note 4 INPUT SET RESPONSE (fclk = 40 MHz; see Fig.8; note 5) tSTLH tSTHL analog input settling time LOW-to-HIGH analog input settling time HIGH-to-LOW full-scale square wave full-scale square wave - - 3 3 5 5 ns ns - - - - 10 13 20 350 - - - - MHz MHz MHz MHz
HARMONICS; (fclk = 40 MHZ; see Fig.9; note 6) THD total harmonic distortion fi = 4.43 MHz - -50 - dB
1996 Feb 21
7
Philips Semiconductors
Product specification
8-bit, 40 Msps 2.7 to 5.5 V universal analog-to-digital converter
SYMBOL PARAMETER CONDITIONS - MIN. TYP. -
TDA8790
MAX.
UNIT
SIGNAL-TO-NOISE RATIO; see Fig.9; note 6 S/N signal-to-noise ratio (full scale) without harmonics; fclk = 40 MHz; fi = 4.43 MHz fclk = 40 MHz fi = 300 kHz fi = 4.43 MHz DIFFERENTIAL GAIN; see note 7 Gdiff differential gain fclk = 40 MHz; PAL modulated ramp - 1.5 - % - - 7.8 7.3 - - bits bits 47 dB
EFFECTIVE BITS; see Fig.9; note 6 EB effective bits
DIFFERENTIAL PHASE; see note 7 diff differential phase fclk = 40 MHz; PAL modulated ramp - 0.25 - deg
Timing (fclk = 40 MHz; CL = 20 pF); see Fig.4; note 8 tds th td sampling delay time output hold time output delay time VDDO = 4.75 V VDDO = 3.15 V VDDO = 2.7 V 3-state sleep mode delay times; see Fig.5 tdZH tdZL tdHZ tdLZ Notes 1. In addition to a good layout of the digital and analog ground, it is recommended that the rise and fall times of the clock must not be less than 1 ns. 2. Analog input voltages producing code 0 up to and including 256: a) VosB (voltage offset BOTTOM) is the difference between the analog input which produces data equal to 00 and the reference voltage BOTTOM (VRB) at Tamb = 25 C. b) VosT (voltage offset TOP) is the difference between VRT (reference voltage TOP) and the analog input which produces data outputs equal to 256 at Tamb = 25 C. enable HIGH enable LOW disable HIGH disable LOW - - - - 14 16 16 14 18 20 20 18 ns ns ns ns - 5 8 8 8 - - 12 17 18 5 - 15 20 21 ns ns ns ns ns
1996 Feb 21
8
Philips Semiconductors
Product specification
8-bit, 40 Msps 2.7 to 5.5 V universal analog-to-digital converter
TDA8790
3. In order to ensure the optimum linearity performance of such converter architecture the lower and upper extremities of the converter reference resistor ladder (corresponding to output codes 0 and 255 respectively) are connected to pins VRB and VRT via offset resistors ROB and ROT as shown in Fig.3. V RT - V RB a) The current flowing into the resistor ladder is I L = ----------------------------------------- and the full-scale input range at the converter, R OB + R L + R OT RL to cover code 0 to code 255, is V i = R L x I L = ----------------------------------------- x ( V RT - V RB ) = 0.838 x ( V RT - V RB ) R OB + R L + R OT b) Since RL, ROB and ROT have similar behaviour with respect to process and temperature variation, the ratio RL ----------------------------------------- will be kept reasonably constant from part to part. Consequently variation of the output codes R OB + R L + R OT at a given input voltage depends mainly on the difference VRT - VRB and its variation with temperature and supply voltage. When several ADCs are connected in parallel and fed with the same reference source, the matching between each of them is then optimized. 4. The analog bandwidth is defined as the maximum input sine wave frequency which can be applied to the device. No glitches greater than 2 LSBs, nor any significant attenuation is observed in the reconstructed signal. 5. The analog input settling time is the minimum time required for the input signal to be stabilized after a sharp full-scale input (square-wave signal) in order to sample the signal and obtain correct output data. 6. Effective bits are obtained via a Fast Fourier Transform (FFT) treatment taking 8 K acquisition points per equivalent fundamental period. The calculation takes into account all harmonics and noise up to half of the clock frequency (NYQUIST frequency). Conversion to signal-to-noise ratio: S/N = EB x 6.02 + 1.76 dB. 7. Measurement carried out using video analyser VM700A, where video analog signal is reconstructed through a DAC. 8. Output data acquisition: the output data is available after the maximum delay time of td.
handbook, halfpage
VRT
9 ROT RL RLAD IL code 0 ROB code 255
VRM
7
VRB
6
MGD284
Fig.3 Explanation of note 3.
1996 Feb 21
9
Philips Semiconductors
Product specification
8-bit, 40 Msps 2.7 to 5.5 V universal analog-to-digital converter
Table 1 Output coding and input voltage (typical values; referenced to VSSA) VI(p-p) (V) <1.37 1.37 . . . . 3.13 >3.13 BINARY OUTPUT BITS D7 0 0 0 . . 1 1 1 D6 0 0 0 . . 1 1 1 D5 0 0 0 . . 1 1 1 D4 0 0 0 . . 1 1 1 D3 0 0 0 . . 1 1 1 D2 0 0 0 . . 1 1 1
TDA8790
STEP Underflow 0 1 . . 254 255 Overflow Table 2
D1 0 0 0 . . 1 1 1
D0 0 0 1 . . 0 1 1
Sleep mode selection SLEEP 1 0 D7 TO D0 high impedance active IDDA + IDDD (typ.) 1.2 mA 9 mA
handbook, full pagewidth
t CPL t CPH CLK 50 %
sample N
sample N + 1
sample N + 2
Vl
t ds DATA D0 to D7 DATA N-2 DATA N-1 td
th VDDO DATA N DATA N+1
MSA670
50 % 0V
Fig.4 Timing diagram.
1996 Feb 21
10
Philips Semiconductors
Product specification
8-bit, 40 Msps 2.7 to 5.5 V universal analog-to-digital converter
TDA8790
handbook, full pagewidth
V DDD SLEEP 50 %
t dHZ HIGH 90 % output data t dLZ HIGH output data LOW 10 % 50 % t dZL LOW
t dZH
50 %
TEST V DDD 3.3 k TDA8790 20 pF SLEEP S1 t dLZ t dZL t dHZ t dZH
S1 VDDD VDDD GND GND
MBE503
fSLEEP = 100 kHz.
Fig.5 Timing diagram and test conditions of 3-state output delay time.
1996 Feb 21
11
Philips Semiconductors
Product specification
8-bit, 40 Msps 2.7 to 5.5 V universal analog-to-digital converter
TDA8790
MBE548
handbook, full pagewidth
0.291
A (LSB) 0.178
0.065
-0.047
-0.160
-0.272
0
34
68
102
136
170
204
238 255 codes
Fig.6 Typical integral non-linearity (INL) performance.
MBE549
handbook, full pagewidth
0.150
A (LSB) 0.091
0.032
-0.025
-0.84
-0.143
0
34
68
102
136
170
204
238 255 codes
Fig.7 Typical differential non-linearity (DNL) performance.
1996 Feb 21
12
Philips Semiconductors
Product specification
8-bit, 40 Msps 2.7 to 5.5 V universal analog-to-digital converter
TDA8790
t STLH
handbook, full pagewidth
t STHL
code 255 VI code 0 5 ns 5 ns 50 % 50 %
CLK
50 %
50 %
MBE504
2 ns
2 ns
Fig.8 Analog input settling-time diagram.
MBE550
0 A (dB) 20
40
60
80
100
120 0 2.5 5.0 7.5 10.0 12.5 15.0 17.5 f (MHz) Effective bits: 7.32; THD = 51.08 dB. Harmonic levels (dB): 2nd = -68.99; 3rd = -51.62; 4th = -66.05; 5th = -63.23; 6th = -72.79. 20
Fig.9 Typical Fast Fourier Transform (fclk = 40 MHz; fi = 4.43 MHz).
1996 Feb 21
13
Philips Semiconductors
Product specification
8-bit, 40 Msps 2.7 to 5.5 V universal analog-to-digital converter
INTERNAL PIN CONFIGURATIONS
TDA8790
handbook, halfpage
V DDO
andbook, halfpage
V DDA
D7 to D0 VI
V SSO
MBE505
VSSA
MLC857
Fig.10 CMOS data outputs.
Fig.11 Analog inputs.
V DDO
handbook, halfpage
VDDA
VRT SLEEP VRM VRB R LAD
V SSO
MBE506
VSSA
MLC859
Fig.12 SLEEP 3-state input.
Fig.13 VRB, VRM and VRT.
1996 Feb 21
14
Philips Semiconductors
Product specification
8-bit, 40 Msps 2.7 to 5.5 V universal analog-to-digital converter
TDA8790
DDD handbook, halfpage
V
CLK
1/2V
DDD
VSSD
MLC860
Fig.14 CLK input.
APPLICATION INFORMATION
CLK SLEEP VDDD VSSD VDDA VSSA VRB 100 nF VSSA 100 nF VRT VSSA 100 nF VSSA
(1)
1 2 3 4 5
20 19 18 17 16
VDDO D7 D6 D5 D4 D3 D2 D1 D0 VSSO
TDA8790
6 7 8 9 10 15 14 13 12 11
MBE507
VRM (1) VI
(1)
The analog and digital supplies should be separated and decoupled. The external voltage generator must be built such that a good supply voltage ripple rejection is achieved with respect to the LSB value. Eventually, the reference ladder voltages can be derived from a well regulated VDDA supply through a resistor bridge and a decoupled capacitor. (1) VRB, VRM and VRT are decoupled to VSSA.
Fig.15 Application diagram.
1996 Feb 21
15
Philips Semiconductors
Product specification
8-bit, 40 Msps 2.7 to 5.5 V universal analog-to-digital converter
PACKAGE OUTLINE SSOP20: plastic shrink small outline package; 20 leads; body width 4.4 mm
TDA8790
SOT266-1
D
E
A X
c y HE vM A
Z
20
11
Q A2 pin 1 index A1 (A 3) Lp L A
1
e bp
10
detail X wM
0
2.5 scale
5 mm
DIMENSIONS (mm are the original dimensions) UNIT mm A max. 1.5 A1 0.15 0 A2 1.4 1.2 A3 0.25 bp 0.32 0.20 c 0.20 0.13 D (1) 6.6 6.4 E (1) 4.5 4.3 e 0.65 HE 6.6 6.2 L 1.0 Lp 0.75 0.45 Q 0.65 0.45 v 0.2 w 0.13 y 0.1 Z (1) 0.48 0.18 10 0o
o
Note 1. Plastic or metal protrusions of 0.20 mm maximum per side are not included. OUTLINE VERSION SOT266-1 REFERENCES IEC JEDEC EIAJ EUROPEAN PROJECTION
ISSUE DATE 90-04-05 95-02-25
1996 Feb 21
16
Philips Semiconductors
Product specification
8-bit, 40 Msps 2.7 to 5.5 V universal analog-to-digital converter
SOLDERING Introduction There is no soldering method that is ideal for all IC packages. Wave soldering is often preferred when through-hole and surface mounted components are mixed on one printed-circuit board. However, wave soldering is not always suitable for surface mounted ICs, or for printed-circuits with high population densities. In these cases reflow soldering is often used. This text gives a very brief insight to a complex technology. A more in-depth account of soldering ICs can be found in our "IC Package Databook" (order code 9398 652 90011). Reflow soldering SSOP Reflow soldering techniques are suitable for all SSOP packages. Reflow soldering requires solder paste (a suspension of fine solder particles, flux and binding agent) to be applied to the printed-circuit board by screen printing, stencilling or pressure-syringe dispensing before package placement. Several techniques exist for reflowing; for example, thermal conduction by heated belt. Dwell times vary between 50 and 300 seconds depending on heating method. Typical reflow temperatures range from 215 to 250 C. Preheating is necessary to dry the paste and evaporate the binding agent. Preheating duration: 45 minutes at 45 C. Wave soldering SSOP Wave soldering is not recommended for SSOP packages. This is because of the likelihood of solder bridging due to closely-spaced leads and the possibility of incomplete solder penetration in multi-lead devices.
TDA8790
If wave soldering cannot be avoided, the following conditions must be observed: * A double-wave (a turbulent wave with high upward pressure followed by a smooth laminar wave) soldering technique should be used. * The longitudinal axis of the package footprint must be parallel to the solder flow and must incorporate solder thieves at the downstream end. Even with these conditions, only consider wave soldering SSOP packages that have a body width of 4.4 mm, that is SSOP16 (SOT369-1) or SSOP20 (SOT266-1). During placement and before soldering, the package must be fixed with a droplet of adhesive. The adhesive can be applied by screen printing, pin transfer or syringe dispensing. The package can be soldered after the adhesive is cured. Maximum permissible solder temperature is 260 C, and maximum duration of package immersion in solder is 10 seconds, if cooled to less than 150 C within 6 seconds. Typical dwell time is 4 seconds at 250 C. A mildly-activated flux will eliminate the need for removal of corrosive residues in most applications. Repairing soldered joints Fix the component by first soldering two diagonallyopposite end leads. Use only a low voltage soldering iron (less than 24 V) applied to the flat part of the lead. Contact time must be limited to 10 seconds at up to 300 C. When using a dedicated tool, all other leads can be soldered in one operation within 2 to 5 seconds at between 270 and 320 C.
1996 Feb 21
17
Philips Semiconductors
Product specification
8-bit, 40 Msps 2.7 to 5.5 V universal analog-to-digital converter
DEFINITIONS Data sheet status Objective specification Preliminary specification Product specification Limiting values
TDA8790
This data sheet contains target or goal specifications for product development. This data sheet contains preliminary data; supplementary data may be published later. This data sheet contains final product specifications.
Limiting values given are in accordance with the Absolute Maximum Rating System (IEC 134). Stress above one or more of the limiting values may cause permanent damage to the device. These are stress ratings only and operation of the device at these or at any other conditions above those given in the Characteristics sections of the specification is not implied. Exposure to limiting values for extended periods may affect device reliability. Application information Where application information is given, it is advisory and does not form part of the specification. LIFE SUPPORT APPLICATIONS These products are not designed for use in life support appliances, devices, or systems where malfunction of these products can reasonably be expected to result in personal injury. Philips customers using or selling these products for use in such applications do so at their own risk and agree to fully indemnify Philips for any damages resulting from such improper use or sale.
1996 Feb 21
18
Philips Semiconductors
Product specification
8-bit, 40 Msps 2.7 to 5.5 V universal analog-to-digital converter
NOTES
TDA8790
1996 Feb 21
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Philips Semiconductors - a worldwide company
Argentina: IEROD, Av. Juramento 1992 - 14.b, (1428) BUENOS AIRES, Tel. (541)786 7633, Fax. (541)786 9367 Australia: 34 Waterloo Road, NORTH RYDE, NSW 2113, Tel. (02)805 4455, Fax. (02)805 4466 Austria: Triester Str. 64, A-1101 WIEN, P.O. Box 213, Tel. (01)60 101-1236, Fax. (01)60 101-1211 Belgium: Postbus 90050, 5600 PB EINDHOVEN, The Netherlands, Tel. (31)40-2783749, Fax. (31)40-2788399 Brazil: Rua do Rocio 220 - 5th floor, Suite 51, CEP: 04552-903-SAO PAULO-SP, Brazil, P.O. Box 7383 (01064-970), Tel. (011)821-2333, Fax. (011)829-1849 Canada: PHILIPS SEMICONDUCTORS/COMPONENTS: Tel. (800) 234-7381, Fax. (708) 296-8556 Chile: Av. Santa Maria 0760, SANTIAGO, Tel. (02)773 816, Fax. (02)777 6730 China/Hong Kong: 501 Hong Kong Industrial Technology Centre, 72 Tat Chee Avenue, Kowloon Tong, HONG KONG, Tel. (852)2319 7888, Fax. (852)2319 7700 Colombia: IPRELENSO LTDA, Carrera 21 No. 56-17, 77621 BOGOTA, Tel. (571)249 7624/(571)217 4609, Fax. (571)217 4549 Denmark: Prags Boulevard 80, PB 1919, DK-2300 COPENHAGEN S, Tel. (45)32 88 26 36, Fax. (45)31 57 19 49 Finland: Sinikalliontie 3, FIN-02630 ESPOO, Tel. (358)0-615 800, Fax. (358)0-61580 920 France: 4 Rue du Port-aux-Vins, BP317, 92156 SURESNES Cedex, Tel. (01)4099 6161, Fax. (01)4099 6427 Germany: P.O. Box 10 51 40, 20035 HAMBURG, Tel. (040)23 53 60, Fax. (040)23 53 63 00 Greece: No. 15, 25th March Street, GR 17778 TAVROS, Tel. (01)4894 339/4894 911, Fax. (01)4814 240 India: Philips INDIA Ltd, Shivsagar Estate, A Block, Dr. Annie Besant Rd. Worli, Bombay 400 018 Tel. (022)4938 541, Fax. (022)4938 722 Indonesia: Philips House, Jalan H.R. Rasuna Said Kav. 3-4, P.O. Box 4252, JAKARTA 12950, Tel. (021)5201 122, Fax. (021)5205 189 Ireland: Newstead, Clonskeagh, DUBLIN 14, Tel. (01)7640 000, Fax. (01)7640 200 Italy: PHILIPS SEMICONDUCTORS S.r.l., Piazza IV Novembre 3, 20124 MILANO, Tel. (0039)2 6752 2531, Fax. (0039)2 6752 2557 Japan: Philips Bldg 13-37, Kohnan 2 -chome, Minato-ku, TOKYO 108, Tel. (03)3740 5130, Fax. (03)3740 5077 Korea: Philips House, 260-199 Itaewon-dong, Yongsan-ku, SEOUL, Tel. (02)709-1412, Fax. (02)709-1415 Malaysia: No. 76 Jalan Universiti, 46200 PETALING JAYA, SELANGOR, Tel. (03)750 5214, Fax. (03)757 4880 Mexico: 5900 Gateway East, Suite 200, EL PASO, TX 79905, Tel. 9-5(800)234-7381, Fax. (708)296-8556 Netherlands: Postbus 90050, 5600 PB EINDHOVEN, Bldg. VB, Tel. (040)2783749, Fax. (040)2788399 New Zealand: 2 Wagener Place, C.P.O. Box 1041, AUCKLAND, Tel. (09)849-4160, Fax. (09)849-7811 Norway: Box 1, Manglerud 0612, OSLO, Tel. (022)74 8000, Fax. (022)74 8341 Pakistan: Philips Electrical Industries of Pakistan Ltd., Exchange Bldg. ST-2/A, Block 9, KDA Scheme 5, Clifton, KARACHI 75600, Tel. (021)587 4641-49, Fax. (021)577035/5874546 Philippines: PHILIPS SEMICONDUCTORS PHILIPPINES Inc., 106 Valero St. Salcedo Village, P.O. Box 2108 MCC, MAKATI, Metro MANILA, Tel. (63) 2 816 6380, Fax. (63) 2 817 3474 Portugal: PHILIPS PORTUGUESA, S.A., Rua dr. Antonio Loureiro Borges 5, Arquiparque - Miraflores, Apartado 300, 2795 LINDA-A-VELHA, Tel. (01)4163160/4163333, Fax. (01)4163174/4163366 Singapore: Lorong 1, Toa Payoh, SINGAPORE 1231, Tel. (65)350 2000, Fax. (65)251 6500 South Africa: S.A. PHILIPS Pty Ltd., 195-215 Main Road Martindale, 2092 JOHANNESBURG, P.O. Box 7430, Johannesburg 2000, Tel. (011)470-5911, Fax. (011)470-5494 Spain: Balmes 22, 08007 BARCELONA, Tel. (03)301 6312, Fax. (03)301 42 43 Sweden: Kottbygatan 7, Akalla. S-164 85 STOCKHOLM, Tel. (0)8-632 2000, Fax. (0)8-632 2745 Switzerland: Allmendstrasse 140, CH-8027 ZURICH, Tel. (01)488 2211, Fax. (01)481 77 30 Taiwan: PHILIPS TAIWAN Ltd., 23-30F, 66, Chung Hsiao West Road, Sec. 1. Taipeh, Taiwan ROC, P.O. Box 22978, TAIPEI 100, Tel. (886) 2 382 4443, Fax. (886) 2 382 4444 Thailand: PHILIPS ELECTRONICS (THAILAND) Ltd., 209/2 Sanpavuth-Bangna Road Prakanong, Bangkok 10260, THAILAND, Tel. (66) 2 745-4090, Fax. (66) 2 398-0793 Turkey: Talatpasa Cad. No. 5, 80640 GULTEPE/ISTANBUL, Tel. (0 212)279 27 70, Fax. (0212)282 67 07 Ukraine: Philips UKRAINE, 2A Akademika Koroleva str., Office 165, 252148 KIEV, Tel. 380-44-4760297, Fax. 380-44-4766991 United Kingdom: Philips Semiconductors LTD., 276 Bath Road, Hayes, MIDDLESEX UB3 5BX, Tel. (0181)730-5000, Fax. (0181)754-8421 United States: 811 East Arques Avenue, SUNNYVALE, CA 94088-3409, Tel. (800)234-7381, Fax. (708)296-8556 Uruguay: Coronel Mora 433, MONTEVIDEO, Tel. (02)70-4044, Fax. (02)92 0601
Internet: http://www.semiconductors.philips.com/ps/ For all other countries apply to: Philips Semiconductors, International Marketing and Sales, Building BE-p, P.O. Box 218, 5600 MD EINDHOVEN, The Netherlands, Telex 35000 phtcnl, Fax. +31-40-2724825 SCDS47 (c) Philips Electronics N.V. 1996
All rights are reserved. Reproduction in whole or in part is prohibited without the prior written consent of the copyright owner. The information presented in this document does not form part of any quotation or contract, is believed to be accurate and reliable and may be changed without notice. No liability will be accepted by the publisher for any consequence of its use. Publication thereof does not convey nor imply any license under patent- or other industrial or intellectual property rights.
Printed in The Netherlands
537021/1100/03/pp20 Document order number: Date of release: 1996 Feb 21 9397 750 00677

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